TO_ST=noEvent, CH_ST=disabled, CTZ_ST=noEvent, IPEND=inactive, RLD_ST=noEvent, BUS_ERR=noEvent
DMA Channel Status Register.
| CH_ST | Channel Status. This bit is used to indicate to the programmer when it is safe to change the configuration, address, and count registers for the channel. Whenever this bit is cleared by hardware, the DMA_CFG.CHEN bit is also cleared (if not cleared already). 0 (disabled): Disabled. 1 (enabled): Enabled. |
| IPEND | Channel Interrupt. 0 (inactive): No interrupt is pending. 1 (pending): An interrupt is pending. |
| CTZ_ST | Count-to-Zero (CTZ) Status 0 (noEvent): The event has not occurred. 1 (Clear): Clears the interrupt flag 1 (ctz_occur): The event has occurred. |
| RLD_ST | Reload Status. 0 (noEvent): The event has not occurred. 1 (reloaded): The event has occurred. 1 (Clear): Clears the interrupt flag |
| BUS_ERR | Bus Error. Indicates that an AHB abort was received and the channel has been disabled. 0 (noEvent): The event has not occurred. 1 (Clear): Clears the interrupt flag 1 (bus_err): The event has occurred. |
| TO_ST | Time-Out Status. 0 (noEvent): The event has not occurred. 1 (Clear): Clears the interrupt flag 1 (expired): The event has occurred. |